NJ Pocket initial signal analysis

NJ Pocket initial signal analysis

To add to my previous post, I ran my oscilloscope over the pins on the small board. It exposes 44 pins, and one would expect to see 16 data pins, and the full 21 addressing space. So a quick look revealed 23 pins with a waveform like this:

That seem to be address and control data from the CPU. Additionally 16 pins had a much sharper response, and are likely the data pins.

Of the remaining 5 pins, one seemed to carry Vcc, three were grounded, and one had a negative-trigger behaviour:

And is likely the /OE pin. So far so good. One of the test pads also carries a control signal, but until I remove the board it will impossible to determine which one. At any rate, it seems the basic signals required to dump the ROM are available, so that will be one of the first tasks. Once I’ll post about unsoldering and figure the pinout, I’ll detail my dumping hardware.

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