NJ Pocket memory reverse engineering.

NJ Pocket memory reverse engineering.

I finally got around to figure out the pinout of the little Flash ROM board in the NJ Pocket. For that I had to remove it to check the bottom pins… and well, let’s say things didn’t went very well:

Despite my best efforts to safely remove it, the board is glued before the soldering. This complicated the job of removing the solder cleanly, and it led to a last ditch effort that resulted in way more damage than was needed. Luckily there are plenty of test pads and I haven’t damaged any additional hardware other than a slightly scratched ground track. As such, It might still be possible to connect some test hardware to the CPU – I already have a simple VHDL module ready for this and will get around to writing some code soon.

Click on to see the results of my efforts…

Before I put up the design, I have to say that this work wouldn’t have been possible without the valuable help of Sprite_tm of spritesmods.com. He contacted me with a lot of valuable information and more important, he removed the epoxy from the CPU in his board and made it possible to see the connection pinout. With that information and the  (somewhat incorrect) preliminary datasheet, mapping everything was a breeze:

As I was finishing, it became obvious that the NJ Pocket might not use a Read/Write signal at all, treating it as a huge block of asynchronous SRAM. I also started decoding the memory board routes to the Flash chip:

The green tracks there are individual paths that don’t connect to the main board. It’s very likely they were used while programming and might still be reusable. In particular, it might be used in some type of standard industrial Flash programming scheme, that I need to look into.

Anyway, this was a good week for this project, hope to bring more good news soon.

One thought on “NJ Pocket memory reverse engineering.

  1. Pingback: ROM Dumping in progress… | low-end.net

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