Here is the small, but significant, first step into programming the VT168. Using a standard build of the cc65 C compiler and a draft configuration file, I successfully mapped the memory and structure of the VT168 hardware. With that and the available register documentation, I had a sample running in a few days. However, there is one glaring flaw in the main datasheet – it does not explain how to select color modes for the background layers. After a bit of head scratching, here is how it’s configured:
Color Mode BKx_Color ---------- --- 16 colors 0 0 16 colors? 0 1 64 colors 1 0 256 colors 1 1
The BK1_Color and BK2_Color bits can be found in the 0x2013 and 0x2017 registers, respectively. One interesting feature of this SoC is that, while only 64Kb addressing space is available to the main CPU, with higher portions of the 8Mb memory visible by a mappable 32Kb segment starting at 0x8000, the graphical unit fetches data from that memory space using automatic segment mapping. This makes graphical access very clean. There are a bunch of very clever things in this SoC, actually, and I hope to be able to show them off – that is, if they’re actually not horribly broken in the real hardware.
On that note, after careful consideration of how much work it would be to have a perfectly asyncronous parallel memory that was also multiplexed to the little amount of IO ports I had available on the base Nexys2 development board, I ordered an expansion board, that is a rather fetching piece of hardware:
This (and the neat cheap breadboard they included) allows me to connect all the 40 inputs directly to the FPGA, and from there to bridge it with the built-in SRAM memory of the prototype board. Aw, if only I had remembered to bring my VHDL books with me, because I am pretty darn rusty at it.