Well, as seen in a previous post I damaged the main board pretty seriously while removing the ROM daughterboard, but still had hopes it could be salvaged. In the process of making everything work, sadly, it became obvious that I would be unable to solder connectors to some of the lower address lines and data lines, and hence I still cannot emulate RAM access on the device (it can still be repaired, I think, but i don’t have a conductive ink pen with me to rebuilt the lost tracks). It will take me some weeks to get a replacement, and in the meantime I’m building a dumper for the FlashROM, that you can see up there all wired up.
Of course, misery loves company and the daughterboard also has a damaged data line I am unable to repair, but I was able to access the full address space. I then hit a wall as the Digilent USB EppCtrl VHDL block refuses to work with my makeshift block. This isn’t a problem per se, but I need to sit down and design the memory access block seriously rather than winging it, since this is also about me getting back my reconfigurable hardware mojo for the harder tasks (when I start simulating the hardware that replaces/enhances the current ROM-only daughterboard). Even better, I can then use this setup to dump some other material I own, like a Super 7 in 1 ROM based on the VT03 “enhanced” NES SoC and several 4 in 1 carts for the GameKing. I was actually the first to map the pinouts for the GK 512Kb multicarts 5 years ago, but just never had the time to build the PC interface.